发明名称
摘要 PURPOSE:To attain timing reproduction from an NRZ code with a simple constitution, by providing the 1st and the 2nd pulse generating circuits comprising an AND circuit, delay circuit and an NOT circuit, and a circuit picking up an NOR output of the AND circuit so as to eliminate malfunction. CONSTITUTION:The 1st pulse generating circuit 20 comprises an AND circuit 11, a delay circuit 13 giving a delay to its output by a 1/2-bit length of a receiving signal, and an NOT circuit 17 inverting its output and applying the result to other input of the AND circuit 11. The 2nd pulse generating circuit 21 comprises an AND circuit 12 taking an input signal inverted at an NOT circuit 16 as one input, a delay circuit 14 giving a delay to its output by a 1/2-bit length of a receiving signal, and an NOT circuit 18 inverting its output and applying the result to the other input of an AND circuit 12. Further, the NOR circuit of the AND circuits 11, 12 is picked up at an NOR circuit 15.
申请公布号 JPH0328862(B2) 申请公布日期 1991.04.22
申请号 JP19820165359 申请日期 1982.09.22
申请人 FUJI DENKI KK;FUJI FUAKOMU SEIGYO KK 发明人 KATO TOMIO
分类号 H04L7/027 主分类号 H04L7/027
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