| 摘要 |
To facilitate acceleration or deceleration of the stepping rate of a time-keeping counter responding to driving pulses from a frequency divider connected to a crystal-controlled oscillator, a succession of such driving pulses is taken from an OR gate with inputs receiving a basic pulse train phi gamma a normally present first ancillary pulse train phi beta spacedly interleaved with pulse train phi gamma and a normally absent second ancillary pulse train phi alpha with pulse positions offset from those of the other two pulse trains. To retard the timepiece, the pulses of train phi beta are blocked for a desired period; to advance it, pulses of train phi alpha are interpolated at a rate depending on the cadence of a series of control pulses selectively synthesized from a combination of low-frequency stage outputs of the frequency divider. Externally set selection signals are temporarily stored in a memory circuit including NOR gates with positive-feedback connections to inverting inputs thereof, the memory circuit being periodically tested by a resetting pulse recurring at a frequency lower than that of the driving pulses.
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