DECODER DRIVER CIRCUIT FOR MONOLITHIC MEMORIES

摘要

The specification describes a circuit for transmitting a drive pulse from a source of pulses to a capacitive load, such as a word line or a bit line in a monolithic memory. A discharge path is provided for discharging the capacitive load, thereby preventing false selection of a word or bit line and improving the timing performance of the monolithic memory. The discharge path is shown in the form of a field effect transistor having a source to drain path from the output node to a second node dischargeable to ground potential and is gated by the source of pulses.