| 摘要 |
PURPOSE:To absorb jitter due to the code distortion of an input signal by providing a block having a parity detecting circuit and reading out contents of a register in parallel to determine the parity. CONSTITUTION:The input of the character synchronizing system is inputted to blocks 11 and 12 to 1M from a terminal 1. It is converted to parallel data D101 and P102 by a serial-parallel register 100 of a clock f1, and characters of a character string are stored in character storage parts 111 and 112 to 11M with respect to data D101. Contents of storage parts 111 and 112 to 11M and data D101 are compared with each other by comparators 121 and 122 to 12M, and a coincidence signal is outputted in case of coincidence. The coincidence signal and data P102 are inputted to a discriminating circuit 130, and A bit position corresponding to the parity bit of the register 100 is stored in a register 170. The register 170 reads out contents of the register 100 in parallel, and parity is determined by a parity detecting circuit 172. A selecting circuit 150 selects the block, where a state switching circuit 174 is set to the final state, out of blocks to absorb the jitter due to code distortion. |
