| 摘要 |
<p>A full adder and subtractor circuit comprises four logic units, wherein a first logic unit carries out a logic operation on first and second operands and on information of a preceding bit to provide an output of carry information; a second logic unit carries out a logic operation on said first and second operands, said information of the preceding bit and said output of the carry information providing a result of an arithmatic operation on the first and second operands; a third logic unit carries out a logic operation on the second operand, the output of the carry information and the information of the preceding bit providing an output of a borrow information, and a fourth logic unit carries out a logic operation on an operation instruction, the output of the carry information and said output of the borrow information providing information of a succeeding bit.</p> |
