发明名称 ELECTRONIC TIMEPIECES
摘要 1465565 Electronic timepieces SUWA SEIKOSHA KK 19 Sept 1974 [19 Sept 1973] 40966/74 Heading G3T An electronic watch having a digital electrooptical display is provided with manually operable switch means S 1 to S 4 Fig. 1 which are selectively operable - (i) to display the time of day, (ii) to correct the time indication and (iii) to regulate the running rate of the timepiece. Regulation is obtained by changing the effective division ratio of the frequency divider 1 by automatically adjusting the number of pulses fed to the divider 1 per unit time, the amount of adjustment of the running rate (i.e. "regulating quantity") being selectable by the switch means which also permits display of either the said "regulation quantity" or the time of day, as required. The divider output at <SP>1</SP>/ 60 Hz is applied to a minutes counter 4 which feeds an hours counter 5. The hours counter output O 5 is fed to a decoder driver 8 to operate the hours display while output O 4 ' of the minutes counter is fed to a decoder driver 7 for the minutes display via a selector circuit 6 controlled by the switch S 2 . A 6-bit binary counter 3 stores the amount of regulation required and which is written into it by operation of switch S 3 which applies a regulation determining signal a 3 thereto via an AND gate. A plurality (six) outputs O 1 ' of the divider 1 and a plurality of outputs 03 of the counter 3 are applied to a feedback circuit 2 comprising a plurality of gates as illustrated in Fig. la (not shown). If the outputs 03 are at logic "1" level the signals O 1 ' from the divider are added to the oscillator output f o through a gate E. The resultant output I 1 of the gate is applied to the divider input. The effective division ratio is thus determined by the outputs O 3 of the counter. Upon switching S 2 to earth, the selector circuit 6 causes the time to be displayed and also causes gates OR 1 , OR 2 to open whereby correcting signals for the minutes and hours time displays can be applied, the correcting signals being produced by repeatedly operating switches S 3 , S 4 respectively. When S 2 is switched to positive, the selector circuit 6 causes the selected regulating quantity to be displayed as illustrated Fig. 3 (not shown). Switches S 1 , S 2 may be operated by a crown.
申请公布号 GB1465565(A) 申请公布日期 1977.02.23
申请号 GB19740040966 申请日期 1974.09.19
申请人 SUWA SEIKOSHA KK 发明人
分类号 G04G5/04;G04G3/02;G04G5/00;G04G5/02;G04G9/08 主分类号 G04G5/04
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