发明名称
摘要 PURPOSE:To improve the response and noise characteristic by providing a circuit not giving any output when an output pulse is small and outputting a setting width when the pulse width is less than the setting width to the post stage of a phase detection stage from which a phase error is outputted in terms of a pulse width. CONSTITUTION:Pulse width converting circuits 7-1, 7-2 consist each of a NAND circuit inputting an input pulse and an inverted output of a monostable multivibrator triggered at the negative edge of the input pulse and output a pulse width depending on the output pulse of the monostable multivibrator (between DELTAr and r) when the output pulse width of a phase frequency detector is less than the setting pulse width of the said monostable multivibrator. When the output pulse width of the phase frequency detector 3 is more than it, the pulse having the output pulse width is outputted. If the output pulse width of the phase frequency detector 3 is very small, no output pulse is given and a dead band is produced because of the delay characteristic of the pulse width converting circuits 7-1, 7-2.
申请公布号 JPH0332928(B2) 申请公布日期 1991.05.15
申请号 JP19850192619 申请日期 1985.08.30
申请人 JAPAN RADIO CO LTD 发明人 MYAKE YUKIHIKO
分类号 H03L7/18;H03L7/093 主分类号 H03L7/18
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