Demodulator for frequency-shift carrier systems - has shift register digital filter and coincidence detector

摘要

The demodulator circuit is suitable for use in binary-coded carrier-frequency transmission systems such as frequency shift keying teleprinter networks. The circuit performs as a digital filter whose band width is dependent only on the data transmission speed and not the carrier frequency. Temperature or power supply variations have negligible effect upon the performance. Incoming pulses (Ltg) are amplified in an operational amplifier (V1) and pass to the J and K inputs of 16-bit shift registers (SR1) (SR2) either direct or via an inverter (S). Each register is clocked by a frequency which is double that of the respective carrier frequency. The P and Q outputs and the four AND-gates (U1-4) form a coincidence circuit whose output is taken to two OR-gates. The output passes through low-pass filters and the demodulated data appears at the output of the final amplifier (V2).