| 摘要 |
A processor device including a dedicated signal processor core capable of dynamically scheduling tasks and a task control method thereof are provided to minimize performance change even if the number of executed dedicated signal processes is increased by performing the dedicated signal process according to a dynamic request of more than one CPU core and returning result data to the CPU core. The CPUs(11-1 - 11-3) load a target code of the requested and newly dispatched task to a shared memory section(14a,21a) of an internal and external RAM(14,21). A DSP core(12) downloads the target code from the shared memory section to dynamically schedule generation and termination of the newly dispatched task, and schedules operation of the current task according to a command received from the CPUs. A format of each command is formed by a command content field, a command source filed, a command result data receiver field, and command priority field. |
