发明名称 Method for manufacturing an interposer, interposer and chip package structure
摘要 A method for manufacturing an interposer includes the following steps. Conductive beads is filled in a blind via of a substrate and a solder layer of each conductive bead is melted so as to form a solder post in the blind via. A metal ball of each conductive bead is inlaid in the corresponding solder post such that the solder post and the metal balls inlaid therein construct a conductive though via. Two surfaces of the substrate are planarized such that two ends of the conductive through via are exposed to the two surfaces of the substrate respectively and are flush with the two surfaces of the substrate respectively. A redistribution layer is manufactured at each surface of the substrate such that the two ends of each conductive through via connect the redistribution layers respectively. Besides, an interposer and a chip package structure applied the interposer are also provided.
申请公布号 US9368442(B1) 申请公布日期 2016.06.14
申请号 US201414583755 申请日期 2014.12.28
申请人 Unimicron Technology Corp. 发明人 Tain Ra-Min;Hu Dyi-Chung;Chen Yu-Hua
分类号 H01L23/498;H01L21/48;H01L21/3105 主分类号 H01L23/498
代理机构 Jianq Chyun IP Office 代理人 Jianq Chyun IP Office
主权项 1. A method of manufacturing an interposer, comprising: providing a substrate, wherein the substrate has a first surface, a second surface opposite to the first surface, and a plurality of blind vias recessed into the first surface; filling the blind vias with a plurality of conductive beads, so that each of the blind vias has the plurality of conductive beads, wherein each of the conductive beads comprises a metal ball and a solder layer enclosing the metal ball; melting the solder layers, so as to form a plurality of solder posts in the blind vias, wherein the metal balls are inlaid in the corresponding solder posts, and each of the solder posts and the metal balls inlaid therein construct a conductive through via; planarizing the first surface of the substrate, such that a first end, close to the first surface, of each of the conductive through vias is flush with the first surface of the substrate; removing a portion of the substrate from the second surface of the substrate till a second end, close to the second surface, of each of the conductive through vias is exposed to the second surface of the substrate and is flush with the second surface of the substrate; after the first surface of the substrate is planarized, manufacturing a first redistribution layer at the first surface of the substrate, wherein the first redistribution layer is electrically connected to the first end of each of the conductive through vias; and after the portion of the substrate is removed from the second surface of the substrate, manufacturing a second redistribution layer at the second surface of the substrate, wherein the second redistribution layer is electrically connected to the second end of each of the conductive through vias.
地址 Taoyuan TW