| 摘要 |
PURPOSE:To decrease the number of necessary gates and to facilitate the transformation into an LSI for a digital circuit by using a burst-shaped clock. CONSTITUTION:The outputs of shift registers (si-pa) 9 and 11 are inputted to the shift registers (pa-si) 10 and 12, and the outputs 15 and 16 of the registers 10 and 12 are obtained as the serial data in the timing of the shift start pulses 13 and 14 produced by a shift pulse generator 8. In this case, the order of parallel data MSB-LSB and LSB-MSB are exchanged to the register 10 from the register 9 and to the register 12 from the register 11 respectively. Thus the MSB first and the LSB first of the data 4 can be converted into the LSB first and the MSB first respectively. As a result, the number of gates can be decreased and the transformation into an LSI is facilitated for a digital circuit. |
