| 摘要 |
PURPOSE:To reduce an occupied area and to stabilize the operation of a transistor by a method wherein a capacitor part and a transistor part for a memory cell are formed in the vertical direction on the surface of a substrate and the substrate and a channel region are brought into contact with each other by means of a layer of the same conductivity type. CONSTITUTION:A groove 2 is made on a P-type Si substrate 1. A P<+> layer 3 is formed, by diffusion, at the bottom of this groove; an N-type layer 4 is formed, by diffusion, at the sidewall of the groove. The surface of the layer 4 is covered with an oxide film 5; the inside of the groove 2 is filled with P-type polycrystalline Si 6. A capacitor is made up of the layers 3 and 4 and the polycrystalline Si 6. Then, the upper part of the groove 2 is coated with an oxide film 7. A P-type polycrystalline Si is deposited on this film so that it can be transformed into a P-type single crystal after laser annealing. After that, an N-type source region 9 and an N-type drain region 10 are formed, by diffusion, at this part, and are abutted on the substrate 1 while said single crystal remaining sandwiched by these regions is used as a channel region 8 so that a polycrystalline gate electrode 11 which is buried in an interlayer insulating film 12 can be installed above the channel region. Then, an opening is made on the film 12; an Al wiring part 13 coming into contact with the region 10 is formed while the opening is being buried. |
