发明名称 Semiconductor device and method of fabricating the same
摘要 The purpose of the present invention is to provide a reliable semiconductor device comprising TFTs having a large area integrated circuit with low wiring resistance. One of the features of the present invention is that an LDD region including a region which overlaps with a gate electrode and a region which does not overlap with the gate electrode is provided in one TFT. Another feature of the present invention is that gate electrode comprises a first conductive layer and a second conductive layer and portion of the gate wiring has a clad structure comprising the first conductive layer and the second conductive layer with a low resistance layer interposed therebetween.
申请公布号 US9368642(B2) 申请公布日期 2016.06.14
申请号 US201414464959 申请日期 2014.08.21
申请人 SEMICONDUCTOR ENERGY LABORATORY CO., LTD. 发明人 Yamazaki Shunpei;Koyama Jun
分类号 H01L29/10;H01L29/786;H01L33/00;H01L27/12;H01L27/32;H01L29/49 主分类号 H01L29/10
代理机构 Robinson Intellectual Property Law Office 代理人 Robinson Intellectual Property Law Office ;Robinson Eric J.
主权项 1. A display device comprising a pixel region and a driver circuit region over a substrate, wherein the pixel region comprises: first and second light shielding portions on and in contact with the substrate, an insulating film over the first and second light shielding portions and the substrate; a semiconductor layer including first and second channel regions over the insulating film, wherein the first channel region is overlapped with the first light shielding portion, and the second channel region is overlapped with the second light shielding portion; a gate insulating film over the semiconductor layer; first and second gate electrode portions over the first and second channel regions with the gate insulating film interposed therebetween, respectively; an interlayer insulating film over the first and second gate electrode portions; and a source wiring over the interlayer insulating film, the source wiring electrically connected to the semiconductor layer through an opening of the interlayer insulating film, wherein a portion of the source wiring overlaps with the first channel region, wherein the second channel region is not overlapped with the source wiring, and wherein the first and second light shielding portions include a metal element that is included in the first and second gate electrode portions.
地址 Kanagawa-ken JP