发明名称 DELAY DETECTOR CIRCUIT WITH FREQUENCY OFFSET CORRECTION
摘要 PURPOSE:To obtain a delay detector for an entirely digitized DQPSK and pi/4 shift QPSK by detecting a difference between an absolute phase detected by an absolute phase detecting means, and the absolute phase detected before one symbol data time interval, and discriminating transmitted data. CONSTITUTION:This circuit is equipped with a memory part 12 which stores the absolute phase, and an absolute phase detecting means 10 which compares in digital a received modulated wave whose envelope is constant with an inside reference signal, and directly detects the absolute phase corresponding to the inside reference signal from the memory part 12. And also, this circuit is equipped with a phase difference detecting data judging means 14 which detects the difference between the absolute phase detected by the absolute phase detecting means 10 with the absolute phase detected before the one symbol data time interval, and discriminates the transmitted data. Then, the phase at each time of the received modulated wave: t=kTs [(k) is an integer, and Ts is the symbol data time interval] is directly detected, the difference between this and the phase before the one symbol time, is transmitted, and transmit symbol data are demodulated. Thus, the delay detector for the entirely digitized DQPSK and pi/4 shift QPSK with the frequency offset correction, which is suited to a mobile communication, is obtained.
申请公布号 JPH04172040(A) 申请公布日期 1992.06.19
申请号 JP19900300827 申请日期 1990.11.05
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 ONISHI HIROSHI;MISAIZU KIMIHIDE
分类号 H04L27/227;H04L27/22 主分类号 H04L27/227
代理机构 代理人
主权项
地址