发明名称 INVERTED LOGICAL CIRCUIT
摘要 PURPOSE:To perform high-speed switching operation without spoiling high integration by providing a transistor (TR) which emits an excessive carrier to its base circuit when an npn TR constituting an I<2>L is powered up. CONSTITUTION:Between a power source VEE and a signal input terminal IN, a power-source TR2 which operates as a load and a constant current source is provided. Then, the emitter of a TR3 is connected to the collector-side output terminal of a TR1, and the base and collector of the TR3 are connected to the terminal IN and a ground point GND. Consequently, when the TR1 is saturated, a base current applied to the base of the TR1 and a small number of excessive carriers accumulated in an epitaxial layer nepi right under the base of the TR1 are shunt to the collector of the TR1 by the TR3. Consequently, the effective current amplification factor of the TR1 decreases and a cut-off frequency increases, achieving high-speed switching operation.
申请公布号 JPS57116430(A) 申请公布日期 1982.07.20
申请号 JP19810003630 申请日期 1981.01.13
申请人 TOKYO SHIBAURA DENKI KK 发明人 NAKAI MASANORI
分类号 H01L27/082;H01L21/331;H01L21/8226;H01L27/02;H01L29/73;H03K17/04;H03K19/013;H03K19/018;H03K19/091 主分类号 H01L27/082
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