| 摘要 |
PURPOSE:To maintain stable operation and facilitate high integrity by setting silicon substrates of respective MISFET's at a certain potential. CONSTITUTION:Respective MISFET's are isolated not by insulating films but by channel stopper regions and the channel stopper regions and P-type silicon substrates under the gate electrodes of the MISFET's are set at a certain potential. The respective MISFET's (T1-T6) are electrically isolated by P-type diffused layers (hatched parts ) 9 for channel stoppers. Also, a P-type diffused layer 10 for a high concentration contact and a contact hole 11 for connecting the P-type diffused layer 10 to a Vss Al wiring are provided. By providing one P-type diffused layer 10 for the contact connecting to the grounding source Vss, the P-type silicon substrates of all the MISFET's (T1-T6) are set at the Vss potential and the leakage current of a back channel can be avoided.
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