Nonvolatile memory devices including simultaneous impedance calibration and input command

摘要

An operating method of a nonvolatile memory device is provided which includes receiving a command sequence; detecting whether the input command sequence accompanies an impedance calibration operation; and if the input command sequence accompanies the impedance calibration operation, simultaneously performing an operation corresponding to the input command sequence and the impedance calibration operation.

主权项

1. A memory device, comprising:
a memory cell array; a control logic configured to detect whether an input command sequence for performing a read operation of the memory cell array, a program operation of the memory cell array, or an erase operation of the memory cell array accompanies an impedance calibration operation; an impedance calibration circuit connected with an external reference resistor and configured to generate an impedance calibration code in response to the control logic detecting that the input command sequence for performing a read operation of the memory cell array, a program operation of the memory cell array, or an erase operation of the memory cell array accompanies the impedance calibration operation; and an output driver having an output impedance value calibrated by the impedance calibration code.