发明名称 MULTIPLYING CIRCUIT
摘要 PURPOSE:To reduce the circuit scale by providing an adding circuit adding the output data of the multiplier and the output data of the shift circuit. CONSTITUTION:If the word length of the data pattern F being the object to be multiplied to input data I in a multiplier 1 is defined as n, the output data of the multiplier 1 is shifted by n-bit in a shift circuit 2-1. In an adding circuit 3-1, the multiplying result of the input data I and the factor that the word length composed by repeating the data pattern F like nonterminating decimal two times is 2n-bit can be substantially obtained by adding the output of the multiplier 1 and the output data of the shift circuit 2-1. Therefore, the multiplication of a factor that the word length is long and the input data can be performed with the multiplier 1 with small scale circuit for the factor that the word length is short.
申请公布号 JPH04318621(A) 申请公布日期 1992.11.10
申请号 JP19910086811 申请日期 1991.04.18
申请人 SONY CORP 发明人 OKI MITSUHARU
分类号 G06F7/52;G06F7/523 主分类号 G06F7/52
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