| 摘要 |
<p>PURPOSE:To enable a read-only memory to be micronized and enhanced in degree of integration by a method wherein at least either of a source region and a drain region is covered with conductive material, and a contact pattern region is arranged on the above conductive material. CONSTITUTION:A pattern is laid out in such a manner that a semiconductor substrate between the gate electrodes of two selection line transistor gate electrode regions 3 and a drain region are connected with conductive material. The drain region is covered with conductive material layer 4, and a contact pattern region 5 is arranged on the material layer 4. The conductive material layer 4 covers a drain diffusion layer 11 and a diffusion layer 12 between gate electrodes, or is so constituted as to continuously cover a selection line transistor gate electrode 10 closer to the drain diffusion layer 11 and the diffusion layer 12 between the gate electrodes located on both the sides of the transistor gate electrode 10. Furthermore, the conductive material layer 4 continuously covers a memory cell transistor gate electrode 9 and the diffusion layer 12 between the gate electrodes located an both the sides of the gate electrode 9 corresponding to memory data.</p> |
