发明名称 CONTROLLER AND MEMORY SYSTEM
摘要 According to one embodiment, there is provided a controller including a memory control circuit, a host interface, and a power control circuit. The memory control circuit controls a nonvolatile semiconductor memory. The host interface performs data-format conversion between data of a host and data of the memory control circuit and generates an internal signal according to a low power instruction signal received from the host. The power control circuit performs at least one of a clock stop and a power shutdown to a power supply area including at least part of the host interface according to the internal signal received from the host interface and performs, to the power supply area, at least one of a power restoration and a clock resumption according to the low power instruction signal received from the host.
申请公布号 US2016210072(A1) 申请公布日期 2016.07.21
申请号 US201514796250 申请日期 2015.07.10
申请人 Kabushiki Kaisha Toshiba 发明人 AIZAWA Hiroki
分类号 G06F3/06;G11C5/14 主分类号 G06F3/06
代理机构 代理人
主权项 1. A controller comprising: a memory control circuit that controls a nonvolatile semiconductor memory; a host interface that performs data-format conversion between data of a host and data of the memory control circuit and generates an internal signal according to a low power instruction signal received from the host; a power control circuit that performs at least one of a clock stop and a power shutdown to a power supply area including at least part of the host interface according to the internal signal received from the host interface and performs, to the power supply area, at least one of a power restoration and a clock resumption according to the low power instruction signal received from the host.
地址 Minato-ku JP