发明名称 |
Promotion of partial data segments in flash cache |
摘要 |
For efficient track destage in secondary storage in a more effective manner, for temporal bits employed with sequential bits for controlling the timing for destaging the track in a primary storage, if a first bit has at least one of a lower amount of holes and a hotter data heat metric, it is moved to the lower speed cache level. If the first bit has a hotter data heat and greater than a predetermined number of holes, the first bit is discarded. |
申请公布号 |
US9417808(B2) |
申请公布日期 |
2016.08.16 |
申请号 |
US201514866482 |
申请日期 |
2015.09.25 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
Benhase Michael T.;Blinick Stephen L.;Eleftheriou Evangelos S.;Gupta Lokesh M.;Haas Robert;Hu Xiao-Yu;Kalos Matthew J.;Koltsidas Ioannis;Nielsen Karl A.;Pletka Roman A. |
分类号 |
G06F12/00;G06F3/06;G06F12/08;G06F12/12;G06F12/02 |
主分类号 |
G06F12/00 |
代理机构 |
Griffiths & Seaton PLLC |
代理人 |
Griffiths & Seaton PLLC |
主权项 |
1. A method for promoting partial data segments in a computing storage environment having lower and higher speed levels of cache by a processor, comprising:
configuring a data moving mechanism adapted for performing:
a first of the partial data segments having at least one of a lower amount of holes and a hotter data heat metric is moved to the lower speed cache level; andif the first of the partial data segments has a hotter data heat metric and greater than a predetermined number of holes, the first of the partial data segments is discarded. |
地址 |
Armonk NY US |