发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 <p>PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit capable of restraining delay time variations of clock signal caused from the noise of a power supply voltage. SOLUTION: A power supply for a clock buffer cell 2 and a sub-clock buffer cell 4 which distribute the clock signal of a circuit 1 is separated from other power supplies, and power is supplied from a special power supply wiring 6. Thereby, the effects of power supply noise generated from operation of other circuits can be reduced, such as an input/output interface cell on the buffer cells 2 and 4. Delay time variations of the buffer cells 2 and 4 are restrained, and jitters of a clock signal system can be reduced.</p>
申请公布号 JPH11204649(A) 申请公布日期 1999.07.30
申请号 JP19980004794 申请日期 1998.01.13
申请人 TOSHIBA CORP 发明人 SHIOJI MASAZUMI;EGAWA KANJI
分类号 G06F1/08;G06F1/10;H01L21/82;H01L21/822;H01L27/04;(IPC1-7):H01L21/82 主分类号 G06F1/08
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