发明名称 Floating point addition pipeline including extreme value, comparison and accumulate functions
摘要 A multimedia execution unit configured to perform vectored floating point and integer instructions. The execution unit may include an add/subtract pipeline having far and close data paths. The far path is configured to handle effective addition operations and effective subtraction operations for operands having an absolute exponent difference greater than one. The close path is configured to handle effective subtraction operations for operands having an absolute exponent difference less than or equal to one. The close path is configured to generate two output values, wherein one output value is the first input operand plus an inverted version of the second input operand, while the second output value is equal to the first output value plus one. Selection of the first or second output value in the close path effectuates the round-to-nearest operation for the output of the adder.
申请公布号 US6397239(B2) 申请公布日期 2002.05.28
申请号 US20010778352 申请日期 2001.02.06
申请人 ADVANCED MICRO DEVICES, INC. 发明人 OBERMAN STUART F.;JUFFA NORBERT;WEBER FRED;RAMANI KRISHNAN;CHERUKURI RAVI KRISHNA
分类号 G06F7/57;G06F9/30;G06F9/302;H03M7/24;(IPC1-7):G06F7/42;G06F7/38 主分类号 G06F7/57
代理机构 代理人
主权项
地址