Reference generator system and methods for reading ferroelectric memory cells using reduced bitline voltages

摘要

Methods ( 200 ) and systems ( 108 ) are provided for reading data from ferroelectric memory cells ( 106 ) in which charge is removed from a sense amp input (SABL/SABLB) prior to application of a plateline signal (PL) to the target cell capacitor (C_FE). Where the sense amp input (SABL/SABLB) is initially precharged to zero volts, the extraction of charge provides a negative voltage on the data bitline (BL/BLB) when the plateline signal (PL) is applied, allowing adequate voltage to be applied across the cell capacitor (C_FE) together with reduced plateline voltages (PL).