发明名称 CLOCK RECOVERY CIRCUIT AND TIME AXIS ERROR CORRECTION DEVICE
摘要 PURPOSE:To provide the clock recovery circuit stable with no adjustment and the time axis error correction device immune to dropout and offering ease of digital interface-with respect to the clock recovery circuit from which a reproduced clock synchronously with a synchronizing signal having a time axis fluctuation is obtained. CONSTITUTION:A 0-th hold clock is counted by a counter 3 and a low-order address of a ROM 4 is driven by the count to obtain an internal synchronizing signal. Then a phase comparator circuit 2 compares the phase of an internal synchronizing signal with a phase of an external synchronizing signal and loads a phase difference data to a high-order address of a ROM 4, then a phase control signal is outputted according to a change in the count of the counter 3. Furthermore, a phase shift circuit 5 shifts a phase of a 0-th hold clock based on a phase control signal and a reproduced clock whose phase and frequency is coincident with that of an external synchronizing signal is obtained.
申请公布号 JPH05153557(A) 申请公布日期 1993.06.18
申请号 JP19910312092 申请日期 1991.11.27
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 FURUMIYA SHIGERU;TAKEMURA YOSHIYA
分类号 H04L7/033;H04N5/06;H04N5/932;H04N5/945;H04N5/956 主分类号 H04L7/033
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