发明名称 MEMORY ACCESS CONTROL METHOD FOR PARALLEL COMPUTER SYSTEM AND ARITHMETIC PROCESSOR INTERNAL NETWORK UNIT FOR REALIZING THE METHOD
摘要 PROBLEM TO BE SOLVED: To realize a replay return inhibition processing without requiring the providing of an exclusive interface for the replay return inhibition processing. SOLUTION: A request control part 7 generates a replay inhibition request/replay inhibition release request based on a replay inhibition request/replay inhibition release demand A, and transmits the replay inhibition request and the replay inhibition release request, while interrupting a general request group, from an output port of the same port number as an input port in a replay control part 8 to which replies are concentrated by use of a general request transmitting route. The reply control part 8 transmits the reply inhibition request for an input port to which replies are concentrated to the request control part 7 when the reply return inhibition processing is needed, and transmits the replay inhibition release request to the request control part 7 when the need of the replay return inhibition processing is solved. COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP2004362313(A) 申请公布日期 2004.12.24
申请号 JP20030160605 申请日期 2003.06.05
申请人 NEC COMPUTERTECHNO LTD 发明人 KIRIHARA KOJI
分类号 G06F12/06;G06F12/00;(IPC1-7):G06F12/06 主分类号 G06F12/06
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