发明名称 |
HIGH EFFICIENCY CODING SIGNAL PROCESSING APPARATUS WITH ERROR PROPAGATION INFLUENCE REDUCTION |
摘要 |
According to a high efficiency coding signal processing apparatus of the present invention, in order to suppress error propagation, effectively correct errors, and reduce a signal deterioration upon repetitive coding processing, a bit rate reduction circuit (53) quantizes a video signal and outputs the resultant signal to low- and high-frequency encoders (71, 72, 75, 76). A first transmission sequence packet circuit (77) outputs low-frequency components at a predetermined period. A second transmission sequence packet circuit (79) sequences and outputs high-frequency components. Since the low-frequency components and the high-frequency components are separately sequenced and transmitted, the low-frequency components are free from the influence of errors caused in the high-frequency components. <IMAGE> |
申请公布号 |
EP0517141(A3) |
申请公布日期 |
1993.10.20 |
申请号 |
EP19920109211 |
申请日期 |
1992.06.01 |
申请人 |
KABUSHIKI KAISHA TOSHIBA;TOSHIBA AVE CO., LTD |
发明人 |
SHIMODA, KENJI;TAKEDA, HITOSHI |
分类号 |
H03M7/00;H03M13/00;H04N5/783;H04N5/926;H04N7/52;H04N7/60;H04N9/804;H04N9/806;H04N9/888;H04N19/102;H04N19/115;H04N19/134;H04N19/14;H04N19/172;H04N19/176;H04N19/186;H04N19/196;H04N19/37;H04N19/423;H04N19/46;H04N19/59;H04N19/60;H04N19/625;H04N19/65;H04N19/66;H04N19/67;H04N19/70;H04N19/85;H04N19/89;H04N19/895;H04N19/91 |
主分类号 |
H03M7/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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