| 摘要 |
<p>PURPOSE:To eliminate step out in a master and a slave devices, and to accelerate an original clock, by synchronizing the master device itself based on a synchronizing signal outputted to the slave device. CONSTITUTION:A device which outputs the synchronizing signal to the outside uses the synchronizing signal to be outputted to the outside in its own device. For example, a clock 101 for a display data processing circuit is delayed from the output timing of a clock 106 for the display data processing circuit by an output buffer at a preceding stage before it is outputted from an output terminal 5, then it is outputted to the output terminal 5. Furthermore, clocks 107 and 108 for the display data processing circuit are delayed by input buffers provided respectively between input terminals 6 and 12, and the display data processing circuits 3 and 9. However, since both the clocks 107 and 108 for the display data processing circuit are the signals in which the clock 101 for the display data processing circuit is inputted to image processing processors 1 and 7 via the input terminals 6 and 12 respectively, thereby, the above delay are offset.</p> |
