发明名称 |
MEMORIA DINAMICA DE CIRCUITO INTEGRADO |
摘要 |
<p>A dynamic memory obtains reduced leakage currents through the access transistors by preventing the low-going column conductors from reaching zero volts for at least a majority of the duration of the active portion of a memory cycle. The low-going conductors are allowed to reach zero volts during the refresh operation. One advantage is a possible increase in the data storage time between required refresh operations. An increase in the refresh interval is especially useful for memory operations wherein a multiplicity of columns are selected for a given row selection. The present technique also addresses the tendency toward increased sub-threshold leakage as field effect transistor thresholds decrease.</p> |
申请公布号 |
ES555367(D0) |
申请公布日期 |
1987.11.16 |
申请号 |
ES19670005553 |
申请日期 |
1986.05.27 |
申请人 |
AMERICAN TELEPHONE AND TELEGRAPH COMPANY. |
发明人 |
|
分类号 |
G11C11/409;G11C11/406;G11C11/407;G11C11/4094;(IPC1-7):G11C11/34;G11C15/04 |
主分类号 |
G11C11/409 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|