| 摘要 |
PURPOSE:To synchronously process frame data having 64XN data per multiframe by providing N stages of synchronous processing parts and executing the synchronous processing of 64-channel data in respective synchronous processing parts in time division and successively cyclically reading out synchronous processing results of synchronous processing parts. CONSTITUTION:When frame data of 64XN channels per multiframe is inputted, a data distributing part 23 cyclically inputs respective one-channel data to a first to N-th multiplex synchronizing processing parts 21-1 to 21-N with a 1/64 multiframe period. 64-channel data is inputted to multiplex synchronizing processing parts 21-i (i=1 to N), and each one-channel data is subjected to synchronous processing and is stored in a frame aligner RAM. A data taking-out part 24 cyclically takes out and outputs one-channel data subjected to synchronous processing from multiplex synchronizing processing parts in the state order indicated by a state signal generating part 22. Thus, frame data having 64XN data per frame is synchronously processed. |
