SUPERJUNCTION DEVICE AND SEMICONDUCTOR STRUCTURE COMPRISING THE SAME

摘要

The present disclosure relates to a superjunction device and a semiconductor structure having the same. The superjunction device includes a body region of a second conduction type, a drain region of a first conduction type, a drift region located between said body region and said drain region. The drift region includes first regions of a first conduction type and second regions of a second conduction type arranged alternately along a direction being perpendicular to the direction from the body region to the drain region, and a plurality of trench gate structures, each of them comprising a trench extending into said drift region from an upper surface of said body region and a gate electrode in said trench surrounded by a first dielectric layer filling said trench, and a source region of a first conduction type embedded into said body region. There is no source region along at least 10% of the total interface length between the first dielectric layer and the body region.

主权项

1. A semiconductor structure, which comprises:
a superjunction device, comprising:
a drain region of a first conduction type;a body region of a second conduction type;a drift region located between said body region and said drain region, the drift region comprises first regions of a first conduction type and second regions of a second conduction type arranged alternately along a direction being perpendicular to the direction from the body region to the drain region;a plurality of trench gate structures, each of them comprising a trench extending into said drift region from an upper surface of said body region and a gate electrode in said trench surrounded by a first dielectric layer filling said trench; anda source region of a first conduction type embedded into said body region;wherein there is no source region along at least 10% of the total interface length between the first dielectric layer and the body region; a semiconductor region surrounding said superjunction device and a second dielectric layer formed on said semiconductor region; a gate runner embedded into said second dielectric layer; and a field plate embedded into said second dielectric layer, wherein a thickness of the second dielectric layer between said field plate and the semiconductor region is greater than a thickness of the second dielectric layer between at least a part of said gate runner and the semiconductor region.