| 摘要 |
1,106,462. Addressing stores; printers. INTERNATIONAL BUSINESS MACHINES CORPORATION. 17 June, 1966 [12 July, 1965], No. 27075/66. Headings G4C and G4H. Data storage apparatus comprising storage locations arranged in two groups and two sets, each set including some of the locations in both of the groups, comprises means for addressing the locations sequentially with successively addressed locations being in different groups, including a bi-stable device for selecting either of the groups and a bi-stable device for selecting either of the sets. Assignment of addresses to character positions in a core matrix store is as shown in Fig. 4. In particular, successive addresses 1, 2, 3, 4 . . . occur in alternate ones of the upper and lower halves of the store as shown. One of two groups of six rows is selected by a trigger U1, and triggers A, B, C, D select a row in the selected group as shown, via magnetic cores. Similarly one of two groups of ten columns is selected by a trigger T1 and triggers A, B, C, D, E (different from those used for the rows) select a column in the selected group as shown, via magnetic cores. Incrementing pulses can be arranged to cause the triggers to address the character positions in numerical order cyclically, incrementing by one or two positions at a time, i.e. 1, 2, 3, 4 . . . 240, 1, 2 . . . or 1, 3, 5, 7 . . . 239, 1, 3 . . . the triggers A, B, C for the vertical dimension acting as a ring. In addition, the circuitry can go from address 87 to address 239 in only a few steps. The store is used for storing a coded representation of each character on the type chain of an " on-the-fly " printer for comparison with the characters to be printed (read from a second core store) to control the print hammers. The addressing circuits of the stores are advanced in synchronism with the movement of the type chain. A check on synchronism between the addressing circuit of the first store and a " home " pulse from the printer chain drive is mentioned, and the characters in the second store each include a parity bit. |
