发明名称 COMMUNICATION CONTROLLER
摘要 PURPOSE:To reduce the load on an external CPU by canceling a received data block and resetting a data buffer block. CONSTITUTION:When a received character coincides with the contents of a block cancellation character storage area CAN, the contents of the address saving area ADR of the corresponding line Li and the contents of the range saving area RNGS are stored in an address counting area ADR and a range counting area RNG. Then, the starting address and block storage value of the data buffer block are initialized. Then, while receiving operation is executed the execution of a transmission control program TCP is completed to wait for the generation of the next request for received character processing. Thus, an interruption for block cancellation processing to a central processor 400 is eliminated.
申请公布号 JPS59154534(A) 申请公布日期 1984.09.03
申请号 JP19830028037 申请日期 1983.02.22
申请人 NIPPON DENKI KK 发明人 HIRAIDE TOSHIHIKO
分类号 H04L29/02;G06F13/00;H04L13/00 主分类号 H04L29/02
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