发明名称 |
Method of manufacturing a memory integrated circuit device |
摘要 |
A method of manufacturing a memory integrated circuit device including a memory cell region and a peripheral circuit region on a semiconductor substrate includes the steps of (a) forming a first groove in the memory cell region on the semiconductor substrate; (b) forming a second groove in the peripheral circuit region on the semiconductor substrate; and (c) forming a memory cell transistor in self-alignment with the first groove in the memory cell region and forming a peripheral circuit transistor in the peripheral circuit region using the second groove as an isolation groove. The steps (a) and (b) are performed simultaneously.
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申请公布号 |
US6969663(B2) |
申请公布日期 |
2005.11.29 |
申请号 |
US20030650072 |
申请日期 |
2003.08.28 |
申请人 |
FUJITSU LIMITED |
发明人 |
TAKAHASHI KOJI |
分类号 |
H01L21/76;H01L21/8234;H01L21/8242;H01L21/8246;H01L21/8247;H01L27/088;H01L27/10;H01L27/105;H01L27/108;H01L27/115;H01L29/788;H01L29/792;(IPC1-7):H01L21/76 |
主分类号 |
H01L21/76 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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