| 摘要 |
<p>A semiconductor device characterized by comprising: a first semiconductor layer (12) of a second conductivity type, serving as a base layer; a second semiconductor layer (16) of a first conductivity type disposed on the first semiconductor layer; a plurality of trench like grooves (FIG.47) disposed in a surface of the first semiconductor layer at intervals, at a position remote from the second semiconductor layer, the plurality of trench like grooves comprising a first groove (20) interposed between a main region that serves as a current path and a dummy region covered with an insulating layer; a third semiconductor layer (18) of the first conductivity type disposed on the first semiconductor layer on the main region side; a fourth semiconductor layer (30) of the second conductivity type disposed on the third semiconductor layer; a first main electrode (36) electrically connected to the second semiconductor layer; a second main electrode (34) electrically connected to the fourth semiconductor layer; a gate electrode (24) disposed in the first groove (20) to face, through a gate insulating film, a portion of the third semiconductor layer sandwiched between the first semiconductor layer and the fourth semiconductor layer, the gate electrode being configured to selectively induce a channel in the third semiconductor layer, which electrically connects the first semiconductor layer to the fourth semiconductor layer; and a first additional semiconductor layer (114) of the first conductivity type disposed on the first semiconductor layer on the dummy region side, the first additional semiconductor layer having a bottom at a deeper position, as compared to that of the third semiconductor layer, in a depth direction of the first groove (20). <IMAGE></p> |
