发明名称 PACKET PROCESSING APPARATUS, METHOD, AND PROGRAM
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a packet processing apparatus capable of appropriately suppressing power consumption in accordance with the variation of the traffic volume of arrival packets. <P>SOLUTION: A plurality of processing lines 14 can be started and stopped operating respectively. During operation, a processor 21 is operated by an operating clock capable of adjusting a clock speed to access a memory 13, thereby processing packets preserved in the memory 13. A line control section 15 determines the number of processing lines to be operated and the clock speed of the operating clocks for the processing lines, based on traffic volume of packets to be inputted and power consumption of the processing lines during the operation, in such a way as to process inputted packets without loss and to minimize power consumption of a packet processing device 10, and controls operation of the processing lines and the operating clocks on the basis of the determination. <P>COPYRIGHT: (C)2009,JPO&INPIT</p>
申请公布号 JP2009049887(A) 申请公布日期 2009.03.05
申请号 JP20070215880 申请日期 2007.08.22
申请人 NIPPON TELEGR & TELEPH CORP <NTT> 发明人 SUGISONO KOJI;AOKI MICHIHIRO
分类号 H04L12/70;H04L12/943 主分类号 H04L12/70
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