发明名称 TERMINAL CONTROL SYSTEM
摘要 PURPOSE:To improve the throughput of a system without changing data transmission rates by eliminating the need for a maximum-length transmitting buffer. CONSTITUTION:When a system is started, a host computer C transmits a buffer division-length command to a terminal controller B during the starting of a job JOB. Consequently, the buffer memory in the terminal controller B is divided to the best length for a terminal equipment A. Namely, the terminal controller B has system constitution modified to prepare the most efficient buffer memory. In this dividing method, programmable address counters are employed for the buffer memory, and the start addresses of address counters, namely, buffer size is so set that buffer length necessary for the terminal equipment is obtained.
申请公布号 JPS5846431(A) 申请公布日期 1983.03.17
申请号 JP19810142391 申请日期 1981.09.11
申请人 CANON KK 发明人 HASHIKURA HIDEKI
分类号 H04L13/08;G06F13/00;G06F13/28 主分类号 H04L13/08
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