发明名称 MANAGING SINGLE-WIRE COMMUNICATIONS
摘要 Systems, methods, circuits and computer-readable mediums for managing single-wire communications. In one aspect, a method includes starting a transmission cycle by transmitting a clock pulse to a single-wire bus, sampling a data bit transmitted from a single-wire device through the single-wire bus within the transmission cycle after the transmission of the clock pulse, and determining whether a sampling period of the sampling is smaller than a sampling threshold for the data bit. In response to determining that the sampling period is not smaller than the sampling threshold, the method further includes determining that the transmitted data bit is an invalid data bit, and in response: transmitting a high logic voltage level pulse to the single-wire bus for timeout and restarting the transmission cycle for retransmission of the data bit.
申请公布号 US2016239449(A1) 申请公布日期 2016.08.18
申请号 US201514621144 申请日期 2015.02.12
申请人 Atmel Corporation 发明人 Hapke Jeffrey S.
分类号 G06F13/40;G06F1/12 主分类号 G06F13/40
代理机构 代理人
主权项 1. A method comprising: starting, by a master device, a transmission cycle by transmitting a clock pulse to a single-wire bus, wherein a single-wire device draws power from and communicates with the master device through the single-wire bus; sampling, by the master device and after the transmission of the clock pulse, a data bit transmitted from the single-wire device through the single-wire bus within the transmission cycle; determining, by the master device, whether a sampling period of the sampling is smaller than a sampling threshold for the data bit; and in response to determining that the sampling period is not smaller than the sampling threshold, determining that the transmitted data bit is an invalid data bit, and in response: transmitting a high logic voltage level pulse to the single-wire bus for timeout; andrestarting the transmission cycle for retransmission of the data bit.
地址 San Jose CA US