发明名称 WAFER-LEVEL PACKAGE HAVING ASYNCHRONOUS FIFO BUFFER USED TO DEAL WITH DATA TRANSFER BETWEEN DIFFERENT DIES AND ASSOCIATED METHOD
摘要 A wafer-level package has a first die and a second die. The first die has a first clock source arranged to generate a first clock, a first sub-system arranged to generate transmit data, and an output circuit arranged to output the transmit data according to the first clock. The second die has a second sub-system, a second clock source arranged to generate a second clock, and an input circuit having an asynchronous first-in first-out (FIFO) buffer. The input circuit buffers the transmit data transferred from the output circuit in the asynchronous FIFO buffer according to the first clock, and outputs the buffered transmit data in the asynchronous FIFO buffer to the second sub-system according to the second clock.
申请公布号 US2016239444(A1) 申请公布日期 2016.08.18
申请号 US201615015145 申请日期 2016.02.04
申请人 MEDIATEK INC. 发明人 Chen Yi-Hung;Liu Yuan-Chin
分类号 G06F13/362;G06F1/06;G06F13/40 主分类号 G06F13/362
代理机构 代理人
主权项 1. A wafer-level package comprising: a first die, comprising: a first clock source, arranged to generate a first clock; anda first sub-system, arranged to generate transmit data; andan output circuit, arranged to output the transmit data according to the first clock; and a second die, comprising: a second sub-system;a second clock source, arranged to generate a second clock; andan input circuit, comprising an asynchronous first-in first-out (FIFO) buffer, wherein the input circuit is arranged to buffer the transmit data transferred from the output circuit in the asynchronous FIFO buffer according to the first clock, and output the buffered transmit data in the asynchronous FIFO buffer to the second sub-system according to the second clock.
地址 Hsin-Chu TW