| 摘要 |
(i) forming a pixel electrode pattern for displaying the pixel, on a glass substrate or on a semiconductor substrate; (ii) depositing a first resistor layer of at least one layer or more, a semiconductor layer, a second resistor layer and a data electrode on one end of the pixel electrode pattern in turn, and forming an active pattern by photoetching process; (iii) forming a gate insulation layer in contact with the side faces of the pixel electrode pattern and the active pattern, and forming a gate electrode in contact with the side face of the gate insulation layer; (iv) forming a protective layer in contact with the side face of the gate insulation layer on other end of the pixel electode pattern. The parallel arrangement of the source electrode line and the gate electrode line prevents the short circuit fault between two electrodes, and removes the parasitic capacitance between two electrodes.
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