发明名称 |
Input/output circuits and methods for testing integrated circuit memory devices |
摘要 |
Integrated circuit memory devices include a plurality of pads that receive signals from external of the memory device and a plurality of data buses, a respective one of which is operatively connected to a respective one of the plurality of pads. A plurality of multiplexers is provided, a respective one of which is operatively connected to a respective one of the pads and to each of the data buses, to write data from the data buses to the memory cell in a direct access test mode, and to write data from the respective one of the pads to the memory cell array in a normal mode. The integrated circuit memory devices also preferably include a plurality of input/output devices, a respective one of which operatively connects the respective one of the pads to the respective one of the multiplexers. The plurality of input/output devices preferably are a plurality of pipelines that store signals that are serially received from external of the memory device, and that provide the stored signals to the multiplexers.
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申请公布号 |
US5986953(A) |
申请公布日期 |
1999.11.16 |
申请号 |
US19980073621 |
申请日期 |
1998.05.06 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
KIM, TAE-HYUN;KYUNG, KYE-HYUN |
分类号 |
G01R31/28;G11C11/401;G11C29/00;G11C29/12;G11C29/48;(IPC1-7):G11C7/00 |
主分类号 |
G01R31/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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