| 摘要 |
PURPOSE:To reduce the scale of signal processing and the scale of demodulator by decreasing quantity of arithmetic operation of filters and number of memories and detecting a symbol pulse train without inter-code interference. CONSTITUTION:The demodulator is provided with a synchronization detection circuit 11, a memory 12, a subcarrier separation circuit 13, Nyquist filters 14a-14c, sample memories 15a-15c, and an identification point detection circuit 16. Filter arithmetic operation and rough detection of an identification point are implemented at sample points obtained by thinning the result of arithmetic operation of the Nyquist filters 14a-14c. Then filter arithmetic operation is executed at sample points before and after a sample point obtained by rough detection to detect the identification point, reducing the arithmetic operation quantity of the filter and number of memories and a symbol pulse train without inter-code interference is detected. |
