发明名称 SUB-MOUNT FOR OPTICAL SEMICONDUCTOR ELEMENT
摘要 PURPOSE:To prevent die bonded solder from coming into contact with a junction exposed to a chip side especially when assembling J/D required for low temperature characteristics. CONSTITUTION:Barrier layers 7a and 7b are formed on both surfaces of a sub-mount board 10. Furthermore, an AuSn eutectic solder layer 8 is partially formed on the barrier layer 7b where an AuSn eutectic solder layer 9 is installed to the whole surface of the barrier layer 7b. This construction makes it possible to inhibit the amount of solder which swells out to a chip side to a satisfactory extent, thereby providing a high reliability laser element which reduces an initial failure attributable to soldering short to a junction and which is virtually immune to the effect of solder in an environmental test.
申请公布号 JPH06326210(A) 申请公布日期 1994.11.25
申请号 JP19930111466 申请日期 1993.05.13
申请人 MITSUBISHI ELECTRIC CORP 发明人 ISHII MITSUO
分类号 H01L21/52;H01L23/12;H01L33/62;H01S5/00 主分类号 H01L21/52
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