发明名称 SIMULATOR USING DIGITAL DIFFERENTIAL ANALYZER
摘要 PURPOSE:To ensure the simulation with the optimum arithmetic block by securing the alteration in accordance with the progress of the simulation for the arithmetic block connected in the optimum way according to the conditions of the waveforms or the like which simulate each arithmetic element of the DDA (digital differential analyzer). CONSTITUTION:Timer 2 is actuated by operation start signal 1, and at the same time DDA11 starts the operation. Coincidence circuit 4 compares the output given from timer 2 with alteration time value from RAM7. And when the coincidence is obtained through the comparison, transfer command signal 5 is delivered to transfer circuit 10. At the same time the, comparison is started with alteration time value T2. On the other hand, circuit 10 reads out alteration information UB1 from RAM8 and then sets it to DDA11 as well as gives preparation to the transfer of alteration information UB2 at time value T2. And DDA11 starts the operation via the new arithmetic block altered by information UB1. In such way, the operation is repeated to complete the operation up to alteration time Tn. Then at alteration time Tn+1, circuit 4 delivers stop signal 12, and thus the timer 2 operation is stopped along with the operation of DDA11. Thus all operations complete.
申请公布号 JPS55118145(A) 申请公布日期 1980.09.10
申请号 JP19790025555 申请日期 1979.03.07
申请人 发明人
分类号 G06F7/64;G05B23/02 主分类号 G06F7/64
代理机构 代理人
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