发明名称 DIRECT MEMORY ACCESS CONTROLLER
摘要 PURPOSE:To speed up data transfer between a source memory and a destination memory by dividing an address in a memory into those for the source memory and the destination memory. CONSTITUTION:When data is transferred from a memory connected to the address incrementer 2a of a direct memory access controller 1 to a memory connected to an address incrementer 2b, a central processing unit sets the source address to the address incrementer 2a and the destination a address to the address incrementer 2b. Then a pice of address information 5a and 5b is outputted to the address incrementers 2a and 2b. Simultaneously a memory read signal 7a and a memory write signal 8b are outputted to the memory connected to the address incrementer 2a and to the memory connected to the address incrementer 2b, respectively, and data is transferred.
申请公布号 JPS62249263(A) 申请公布日期 1987.10.30
申请号 JP19860093651 申请日期 1986.04.22
申请人 NEC CORP 发明人 YAKABE YOSHITOSHI
分类号 G06F13/28;(IPC1-7):G06F13/28 主分类号 G06F13/28
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