Method of manufacturing a semiconductor device using a main vernier pattern formed at a right angle to a subsidiary vernier pattern,申请号US19890441522-传众专利搜索

首页产品黄页商标征信

会员服务注册登录

法人/股东/高管

发明名称	Method of manufacturing a semiconductor device using a main vernier pattern formed at a right angle to a subsidiary vernier pattern
摘要
申请公布号	US5017514(A)	申请公布日期	1991.05.21
申请号	US19890441522	申请日期	1989.11.27
申请人	NEC CORPORATION	发明人	NISHIMOTO, SHOZO
分类号	G01D13/10;G03F7/20;G03F9/00;H01L21/027;H01L21/30;H01L21/66	主分类号	G01D13/10
代理机构		代理人
主权项
地址

您可能感兴趣的专利

Method and apparatus for providing enhanced data verification in a computer system.

Improvements in and relating to stands

INK JET HEAD AND INK JET APPARATUS PROVIDED WITH THE SAME.

MANUFACTURE OF COVERED YARN

MULTI-PURPOSE DRYING DEVICE

Merking av data, spesielt datoer

Kabel monterings robot

Lactide copolymers for topical treatment of the skin

Time measurement apparatus and system having reception or transmission function

Power supply for ground fault circuit interrupter

Memory system including local and global caches for storing floating point and integer data

Sheet-like material processing apparatus and photosensitive material processing apparatus

Digital video signal recording apparatus and method

Solid ink stick

Apparatus for wind shear compensation in an MTI radar system

Output characteristics stabilization of CMOS devices

Differential to single-ended conversion circuit for a magnetic wheel speed sensor

Electron beam device having a glass envelope and a focussing lens provided thereon

Circuit breaker device for electric vehicle