发明名称 Retention voltages for integrated circuits
摘要 Various implementations described herein may be directed to retention voltages for integrated circuits. In one implementation, an integrated circuit may include functional circuitry to store data bits, and may also include retention mode circuitry coupled to the functional circuitry to provide retention voltages to the functional circuitry, where the retention mode circuitry may include a first circuitry to provide a first retention voltage to the functional circuitry. The first circuitry may include a first diode device, and may include a first transistor device, a second diode device, or combinations thereof. The retention mode circuitry may also include a second circuitry to provide a second retention voltage to the functional circuitry, where the second circuitry includes second transistor devices. Further, the functional circuitry may be held in a data retention mode when the first retention voltage or the second retention voltage is provided to the functional circuitry.
申请公布号 US9620200(B1) 申请公布日期 2017.04.11
申请号 US201615081869 申请日期 2016.03.26
申请人 ARM Limited 发明人 Mangal Sanjay;Yeung Gus;Kinkade Martin Jay;Mathur Rahul;Sandhu Bal S.;Lattimore George McNeil
分类号 G11C11/00;G11C11/419;G11C11/413;G11C11/412;H01L27/11 主分类号 G11C11/00
代理机构 Pramudji Law Group PLLC 代理人 Pramudji Law Group PLLC ;Pramudji Ari
主权项 1. An integrated circuit, comprising: functional circuitry configured to store one or more data bits; and retention mode circuitry coupled to the functional circuitry and configured to provide a plurality of retention voltages to the functional circuitry, wherein the retention mode circuitry comprises: a first circuitry configured to provide a first retention voltage to the functional circuitry, wherein the first circuitry comprises: a first diode device; anda first transistor device, a second diode device, or combinations thereof; anda second circuitry configured to provide a second retention voltage to the functional circuitry, wherein the second circuitry comprises a plurality of second transistor devices; wherein the functional circuitry is configured to be held in a data retention mode when the first retention voltage or the second retention voltage is provided to the functional circuitry.
地址 Cambridge GB