| 摘要 |
PURPOSE: Method for test-writing to the cell array of a semiconductor memory are provided to reduce the so-called test data pattern delay time and hence the test time during production, in a corresponding manner. CONSTITUTION: A cell array on the right-hand part of the two figures that is annotated in general form by the reference number(10). The cell array comprises a number m bit lines, which are illustrated horizontally, and a number n word lines which are shown running vertically in the figures. One of the bit lines, namely the bit line(2), is annotated representatively by BL, and one of the word lines, namely the word line(2), is annotated representatively by WL. The cells in the cell array(10) are fixed at the intersections of the bit lines with the word lines and are represented symbolically by circles.
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