发明名称 DATA MEMORY HAVING A PLURALITY OF BANKS
摘要 <p>PROBLEM TO BE SOLVED: To form a memory in which difference of line length between a com mon data port and column connection points are small and short. SOLUTION: This memory is a data memory having a plurality of banks BK, each bank comprises many memory cells, and matrix state arrangement consisting of rows to which row lines WL are allotted and columns to which column lines BL are allotted is formed. The banks BK are arranged vertically in solid as a stack, ends of the column lines connected to each column driving devices LV, SS are at the edges parallel to the rows of banks, these edges are in a common plane, this plane is extended in the direction of row and is substantially perpendicular to the direction of column. The column driving devices LV, SS of all banks BK are arranged densely in the direction of column, and arranged adjacently to the edge of the stack or near the edge as a block.</p>
申请公布号 JP2002203390(A) 申请公布日期 2002.07.19
申请号 JP20010339916 申请日期 2001.11.05
申请人 INFINEON TECHNOLOGIES AG 发明人 HOENIGSCHMID HEINZ;MUELLER GERHARD
分类号 G11C11/14;G11C5/02;G11C5/04;G11C5/06;G11C7/00;G11C8/12;G11C11/15;G11C11/401;G11C11/407;(IPC1-7):G11C11/407 主分类号 G11C11/14
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