Integrated circuit with a self-destruction mechanism

摘要

A method and apparatuses for securing an integrated circuit (IC) with a self-destruction mechanism are provided. The IC has a tamper detect circuit that will detect unwanted or unauthorized access to the IC. The IC may store configuration and user data in a memory module. The memory module may be an internal or an external non-volatile or volatile memory source. Configuration and user data stored in the memory module is erased when a tamper condition is detected. The IC is powered down after the erase operation is completed. When the IC is powered down, data stored in a static random access memory (SRAM) module in the IC is erased. When the IC is powered up again, the IC will be in a non-operative state as the configuration data has been completely erased.

主权项

1. A method for securing an integrated circuit (IC), comprising:
detecting a tamper condition via a circuit in the IC; placing the IC in a configurable state; switching a multiplexer internal to the IC from selecting settings for scan pins from one or more pins of the integrated circuit to selecting settings for scan pins from a controller circuit internal to the IC, thus disabling a scan chain interface in the IC while in the configurable state, wherein the disabling prevents external input to the scan chain interface and external output from the scan chain interface and enables sending an internal instruction from the controller circuit via the multiplexer and the scan chain interface; sending, from the controller circuit internal to the integrated circuit, the internal instruction via the scan chain interface, with the external input prevented, wherein the internal instruction directs erasing a specified sector of a memory module; initiating a power down operation in the IC; and powering down the IC.